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STE180NE10
N-CHANNEL 100V - 4.5 m - 180A ISOTOP STripFETTM POWER MOSFET
TYPE STE180NE10
s s s s s
VDSS 100 V
RDS(on) < 6 m
ID 180A
TYPICAL RDS(on) = 4.5 m 100% AVALANCHE TESTED LOW INTRINSIC CAPACITANCE GATE CHARGE MINIMIZED REDUCED VOLTAGE SPREAD
DESCRIPTION This Power MOSFET is the latest development of STMicroelectronis unique "Single Feature SizeTM" strip-based process. The resulting transistor shows extremely high packing density for low onresistance, rugged avalanche characteristics and less critical alignment steps therefore a remarkable manufacturing reproducibility. APPLICATIONS s SMPS & UPS s MOTOR CONTROL s WELDING EQUIPMENT s OUTPUT STAGE FOR PWM, ULTRASONIC CIRCUITS
ISOTOP
INTERNAL SCHEMATIC DIAGRAM
ABSOLUTE MAXIMUM RATINGS
Symbol VDS VDGR VGS ID ID IDM(*) Ptot VISO Tstg Tj February 2003
.
Parameter Drain-source Voltage (VGS = 0) Drain-gate Voltage (RGS = 20 k) Gate- source Voltage Drain Current (continuous) at TC = 25C Drain Current (continuous) at TC = 100C Drain Current (pulsed) Total Dissipation at TC = 25C Derating Factor Insulation Withstand Voltage (AC-RMS) Storage Temperature Operating Junction Temperature
Value 100 100 20 180 119 540 360 2.88 2500 -55 to 150 150
Unit V V V A A A W W/C V C C 1/8
(*) Pulse width limited by safe operating area.
STE180NE10
THERMAL DATA
Rthj-case Thermal Resistance Junction-case Max 0.347 C/W
AVALANCHE CHARACTERISTICS
Symbol IAR EAS Parameter Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tj max) Single Pulse Avalanche Energy (starting Tj = 25 C, ID = IAR, VDD = 25 V) Max Value 60 720 Unit A mJ
ELECTRICAL CHARACTERISTICS (Tcase = 25 C unless otherwise specified) OFF
Symbol V(BR)DSS IDSS Parameter Drain-source Breakdown Voltage Zero Gate Voltage Drain Current (VGS = 0) Gate-body Leakage Current (VDS = 0) Test Conditions ID = 1 mA VGS = 0 Min. 100 4 40 400 Typ. Max. Unit V A A nA
VDS = Max Rating VDS = Max Rating TC = 125C VGS = 20V
IGSS
ON (*)
Symbol VGS(th) RDS(on) Parameter Gate Threshold Voltage Static Drain-source On Resistance Test Conditions VDS = VGS VGS = 10 V ID = 1 mA ID = 90 A Min. 2 Typ. 3 4.5 Max. 4 6 Unit V m
DYNAMIC
Symbol gfs Ciss Coss Crss Parameter Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Test Conditions
VDS>ID(on)xRDS(on)max ID=80 A
Min. 30
Typ.
Max.
Unit S
VDS = 25V, f = 1 MHz, VGS = 0
21 2.5 0.9
nF nF nF
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STE180NE10
ELECTRICAL CHARACTERISTICS (continued) SWITCHING ON
Symbol td(on) tr Qg Qgs Qgd Parameter Turn-on Delay Time Rise Time Total Gate Charge Gate-Source Charge Gate-Drain Charge Test Conditions ID = 90 A VDD = 50 V RG = 4.7 VGS = 10 V (Resistive Load, Figure 3) VDD= 80V ID= 180A VGS = 10V Min. Typ. 100 600 585 120 210 795 Max. Unit ns ns nC nC nC
SWITCHING OFF
Symbol td(off) tf tr(Voff) tf tc Parameter Turn-off Delay Time Fall Time Off-voltage Rise Time Fall Time Cross-over Time Test Conditions ID = 90 A VDD = 50 V RG = 4.7, VGS = 10 V (Resistive Load, Figure 3) ID = 180 A Vclamp = 80 V RG = 4.7, VGS = 10 V (Inductive Load, Figure 5) Min. Typ. 430 440 82 820 950 Max. Unit ns ns ns ns ns
SOURCE DRAIN DIODE
Symbol ISD ISDM (*) VSD (*) trr Qrr IRRM Parameter Source-drain Current Source-drain Current (pulsed) Forward On Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current ISD = 180 A VGS = 0 235 1.65 14 Test Conditions Min. Typ. Max. 180 540 1.5 Unit A A V ns C A
di/dt = 100A/s ISD = 100 A VDD = 50 V Tj = 150C (see test circuit, Figure 5)
(*)Pulsed: Pulse duration = 300 s, duty cycle 1.5 %. (*)Pulse width limited by safe operating area.
Safe Operating Area
Thermal Impedance
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STE180NE10
Output Characteristics Transfer Characteristics
Transconductance
Static Drain-source On Resistance
Gate Charge vs Gate-source Voltage
Capacitance Variations
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STE180NE10
Normalized Gate Threshold Voltage vs Temperature Normalized on Resistance vs Temperature
Source-drain Diode Forward Characteristics
.
.
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STE180NE10
Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform
Fig. 3: Switching Times Test Circuits For Resistive Load
Fig. 4: Gate Charge test Circuit
Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times
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STE180NE10
ISOTOP MECHANICAL DATA
DIM. MIN. A B C D E F G H J K L M N O 11.8 8.9 1.95 0.75 12.6 25.15 31.5 4 4.1 14.9 30.1 37.8 4 7.8 8.2 4.3 15.1 30.3 38.2 mm TYP. MAX. 12.2 9.1 2.05 0.85 12.8 25.5 31.7 MIN. 0.466 0.350 0.076 0.029 0.496 0.990 1.240 0.157 0.161 0.586 1.185 1.488 0.157 0.307 0.322 0.169 0.594 1.193 1.503 inch TYP. MAX. 0.480 0.358 0.080 0.033 0.503 1.003 1.248
G O B
A
N
D E F
J K L M
H
C
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STE180NE10
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is registered trademark of STMicroelectronics (R) 2003 STMicroelectronics - All Rights Reserved All other names are the property of their respective owners. STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - United States. http://www.st.com
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